摘要： 提出一种部署在FPGA器件的SSI通信方法，应用在数据传输领域。SSI通信控制器采用高频时钟同步边沿检测原理对输入时钟信号进行采样，实现数据接收时通信速率的自动兼容功能。通过测量10 Mb/s通信速率时硬件接口时序参数，验证控制器IP功能正常且信号质量良好，采用仿真测试分析控制器IP读、写操作时有效通信带宽都达到设定通信带宽的99.9%以上，验证控制器性能能够满足通信接口需求。

中图分类号：TN914 文献标志码：A DOI: 10.16157/j.issn.0258-7998.245379
中文引用格式： 张晖，杨兆峰，张鑫刚，等. 采用SSI协议实现的通信控制器设计[J]. 电子技术应用，2024，50(10)：93-97.
英文引用格式： Zhang Hui，Yang Zhaofeng，Zhang Xingang，et al. Design of communication controller implemented by SSI protocol[J]. Application of Electronic Technique，2024，50(10)：93-97.

Design of communication controller implemented by SSI protocol

Abstract： This paper proposes an SSI communication method deployed on FPGA devices for application in the field of data transmission. The SSI communication controller adopts the principle of high-frequency clock synchronization edge detection to sample the input clock signal, achieving automatic compatibility of communication rate during data reception. By measuring the hardware interface timing parameters at a communication rate of 10 Mb/s, it was verified that the controller IP function is normal and the signal quality is good. Simulation testing was used to analyze that the effective communication bandwidth of the controller IP during read and write operations reaches over 99.9% of the set communication bandwidth, verifying that the controller performance can meet the communication interface requirements.

Key words : SSI；communication controller；signal edge detect；FPGA