摘要： 随着云计算、大数据等先进计算产业的发展，基于硬件的管理模式实现智能化管理具有重要意义。基于RISC-V核心设计实现一种硬件管理控制芯片，利用网络通信工具，实现对应用系统的有效管理。基于UVM验证方法学构建验证平台进行仿真验证，基于FPGA构建芯片原型验证平台与上位机进行协同验证与稳定性测试。物理设计采用40 nm工艺，设计频率为250 MHz。

中图分类号：TN46 文献标志码：A DOI: 10.16157/j.issn.0258-7998.234629
中文引用格式： 王亚军，李俊龙，赵达，等. 基于RISC-V的硬件管理控制器设计[J]. 电子技术应用，2024，50(6)：32-36.
英文引用格式： Wang Yajun，Li Junlong，Zhao Da，et al. Design of hardware management controller based on RISC-V[J]. Application of Electronic Technique，2024，50(6)：32-36.

Design of hardware management controller based on RISC-V

Abstract： With the development of advanced computing industries such as cloud computing and big data, implementing intelligent management based on hardware management mode is of great significance. A hardware management controller chip is designed and implemented on the RISC-V core, utilizing network communication tools to effectively manage application systems. A verification platform is built on UVM verification methodology for simulation verification, and a chip prototype verification platform is constructed on FPGA for collaborative verification and stability testing with the upper computer. The physical design adopts a 40 nm process with a design frequency of 250 MHz.

Key words : hardware management controller；intelligent management；RISC-V