摘要： 开放芯核协议（Open Core Protocol，OCP）总线可被应用于将IP核功能与接口解耦，实现IP核的即插即用。针对OCP连接到异步时钟域时的同步问题，改进设计了轻量化的同步接口，在同步化控制信息的同时降低了跨时钟域缓存数据导致的硬件消耗。为解决点到点的OCP总线的扩展性不足的缺陷，将设计的跨时钟域OCP总线部署于共享总线互联的高级高性能总线（AMBA High-performance Bus，AHB），实现了多主从多时钟域传输。仿真和验证表明，设计的改进跨时钟域OCP-AHB总线可以正确传输数据，可用于其他工作的快速部署。

中图分类号：TN401
文献标志码：A
DOI: 10.16157/j.issn.0258-7998.223103
中文引用格式： 赵嘉禾，宋润泉，许惟超，等. 基于OCP的轻量级多主从跨时钟域片上总线设计[J]. 电子技术应用，2023，49(2)：45-49.
英文引用格式： Zhao Jiahe，Song Runquan，Xu Weichao，et al. A clock domain crossing multi-master-slave lightweight on-chip bus based on OCP[J]. Application of Electronic Technique，2023，49(2)：45-49.

A clock domain crossing multi-master-slave lightweight on-chip bus based on OCP

Abstract： The open core protocol (OCP) bus can be applied to decouple IP core functions and the interfaces to realize the plug-and-play function. Aiming at the synchronization problem when the OCP is connected to asynchronous clock domain, a lightweight synchronization interface is developed, which not only synchronizes the control signals but also reduces the hardware consumption caused by data buffer across the clock domain. In view of the scalability of the point-to-point OCP bus, the enhanced clock-domain-crossing OCP bus is deployed on the AMBA High-performance Bus (AHB)，which is interconnected by the shared bus, in order to realize multi-master-slave multi-clock transmission. It is proved by simulation that the enhanced clock-domain-crossing OCP-AHB bus can transmit data correctly, which is able to be rapidly deployed in the next step.

Key words : system on chip；clock domain cross；multiple master slave；open core protocol