摘要： 针对基于超外差或低中频的传统导航接收机模拟前端电路功能复杂、功耗高、不利于单片集成等问题，基于模拟最小化，数字最大化的思想，通过芯片内部集成高增益射频放大器、低功耗的高速模数转换器、低抖动的时钟锁相环，创新性地设计并实现了一款基于软件无线电架构的接收机模拟前端电路。通过55 nm CMOS 工艺电路设计、版图设计、仿真及硅流片验证，测试结果表明该接收机前端电路各模块功能正常，实现了单个模拟接收通道处理多模导航信号，极大地降低了模拟电路的规模及功耗并成功应用于一款多模导航SoC芯片中。

中国分类号： TN851
文献标识码： A
DOI：10.16157/j.issn.0258-7998.222671
中文引用格式： 孙金中，付秀兰，高艳丽. 软件无线电架构的导航接收机模拟前端设计[J].电子技术应用，2022，48(8)：131-134，139.
英文引用格式： Sun Jinzhong，Fu Xiulan，Gao Yanli. Design of an analog front-end of navigation receiver based on software defined radio[J]. Application of Electronic Technique，2022，48(8)：131-134，139.

Design of an analog front-end of navigation receiver based on software defined radio

Abstract： The analog front-end of traditional navigation receiver based on superheterodyne or low IF is complex in function, high in power consumption and not conductive to monolithic integration. Based on the idea of analog minimization and digital maximization, a novel analog front-end of navigation receiver based on software radio architecture is designed and implemented by integrating a high gain RF amplifier, a high speed low power ADC and a low jitter clock phase-locked loop. Through 55 nm CMOS process circuit design, layout design, simulation and silicon wafer verification, the test results show that the analog front-end of navigation receiver works normally and only one analog receiver channel is able to process the multimode navigation signals which greatly reduces the size and power consumption of analog circuit. The analog front-end circuit has successfully applied in a multimode navigation SoC chip.

Key words : software defined radio；receiver；amplifier；ADC；PLL