摘要： 随着芯片复杂度增加，芯片验证在设计流程中所消耗时间也不断提高。针对传统验证平台重用性差、覆盖率低，通过使用通用验证方法学(Universal Verification Methodology，UVM)设计Wishbone-SPI验证平台，用UVM组件灵活地搭建验证平台，完成标准的验证框架，设计受约束随机激励，自动统计功能覆盖率。仿真结果显示，该验证平台功能覆盖率达到100%，并表明该平台具有良好的可配置性与可重用性。

中图分类号： TN402
文献标识码： A
DOI：10.16157/j.issn.0258-7998.212337
中文引用格式： 刘森态，庞宇，魏东. 基于UVM的Wishbone-SPI验证平台设计[J].电子技术应用，2022，48(6)：36-41.
英文引用格式： Liu Sentai，Pang Yu，Wei Dong. Design of Wishbone-SPI verification platform based on UVM[J]. Application of Electronic Technique，2022，48(6)：36-41.

Design of Wishbone-SPI verification platform based on UVM

Abstract： As the complexity of the chip increases, the time it takes to verify the chip in the design process continues to increase. Aiming at the poor reusability and low coverage of traditional verification platforms, this paper uses Universal Verification Methodology(UVM) to design the Wishbone-SPI verification platform, uses UVM components to flexibly build the verification platform, completes the standard verification framework, and designs constrained random stimulus, automatically counting function coverage. The simulation results show that the functional coverage of the verification platform reaches 100%, and shows that the platform has good configurability and reusability.

Key words : UVM；SPI；Wishbone；verification platform