摘要： Buck型变换器的开关点是外部调优的主要对象，随着开关频率的提高和负载电流的增大，芯片内的寄生电感对开关电压波形的影响越来越大，外部缓冲电路作为调整开关波形的工具起到关键的作用，仅仅依靠经验来设计外部缓冲电路已经无法满足设计要求。通过对缓冲电路的工作原理进行分析，结合仿真结果和工程实践，分析缓冲电路的稳压性能和效率损失，可以为外围缓冲电路的设计提供一种量化分析方法。

中图分类号： TN492
文献标识码： A
DOI：10.16157/j.issn.0258-7998.211421
中文引用格式： 叶丰华，刘昊，康磊，等. Buck芯片缓冲电路设计的仿真分析与应用[J].电子技术应用，2021，47(10)：113-117，123.
英文引用格式： Ye Fenghua，Liu Hao，Kang Lei，et al. Simulation analysis and application of buck chip buffer circuit design[J]. Application of Electronic Technique，2021，47(10)：113-117，123.

Simulation analysis and application of buck chip buffer circuit design

Abstract： The switching point of the buck converter is the main object of external tuning. With the increase of the switching frequency and the increase of the load current, the parasitic inductance in the chip has an increasing influence on the switching voltage waveform, and the external buffer circuit is used as the adjustment switch. The waveform tool plays a key role, and only relying on experience to design the external buffer circuit can no longer meet the design requirements. By analyzing the working principle of the buffer circuit, combined with simulation results and engineering practice, this paper analyzes the voltage regulation performance and efficiency loss of the buffer circuit, and provides a quantitative analysis method for the design of the peripheral buffer circuit.

Key words : buck converter；simulation；snubber；efficiency