摘要： 介绍了低成本的1 Gb/s源同步SerDes接口应用原理，并详细阐述了低端FPGA如何与高速数据接口以及如何实现对1 Gb/s数据的可靠采样的解决方案。该接口适用于AD9653等源同步SerDes接口的数据转换器。再配合Spartan-6系列等低端FPGA的应用，可以大大降低数据采集系统的成本、功耗和复杂度。

中图分类号： TN98
文献标识码： A
DOI：10.16157/j.issn.0258-7998.191125
中文引用格式： 文科，朱正，马敏舒. 低成本SerDes在数据采集中的方案设计与应用[J].电子技术应用，2020，46(8)：88-91.
英文引用格式： Wen Ke，Zhu Zheng，Ma Minshu. Design and application of low-cost SerDes in data acquisition[J]. Application of Electronic Technique，2020，46(8)：88-91.

Design and application of low-cost SerDes in data acquisition

Abstract： This paper introduces the low cost of 1 Gb/s source-synchronous SerDes interface application principle, and how to interface low-end FPGA with high-speed data and how to implement a reliable sampling solution for 1 Gb/s data are described in detail. This interface is suitable for source-synchronous SerDes data converter as AD9653. Coupled with application of the low-end Spartan-6 series FPGA，this solution can greatly reduce the cost of data acquisition system, power consumption and complexity.

Key words : 1 Gb/s sampling alignment；AD9653；Spartan-6