摘要： 提出了一种基于压摆增强的新恒定跨导轨到轨运算放大器。输入级采用改进型冗余差分对，利用特殊的晶体管串联结构和N/PMOS电流镜，削减差分对管在亚阈值区内的电流，有效抑制了输入级跨导波动；同时结合压摆率增强技术，通过利用MOS管在不同区域之间源漏电压不同的特性，提高了动态响应性能；并且采用Ahuja补偿，在确保相位裕度的前提下，优化了功耗与面积。该电路基于40 nm CMOS工艺完成电路与版图设计，仿真结果表明，电路在3.3 V电源下实现全摆幅输入输出，输入级跨导变化率仅为1.4%。压摆率分别为7.52 V/μs（正）和7.87 V/μs（负），较未增强前提升了50%。直流增益为114 dB，相位裕度79°，单位增益带宽为3.7 MHz。共模抑制比为135 dB，电源抑制比为90 dB。该设计具有高增益、宽摆幅和快速响应等特点，适用于高精度、低功耗模拟应用。

中图分类号：TN402 文献标志码：A DOI: 10.16157/j.issn.0258-7998.257231
中文引用格式： 杨心，刘伟景，赵启林，等. 基于压摆增强的新恒定跨导轨到轨运算放大器[J]. 电子技术应用，2026，52(5)：33-38.
英文引用格式： Yang Xin，Liu Weijing，Zhao Qilin，et al. A novel slew-rate enhanced constant-transconductance rail-to-rail operational amplifier[J]. Application of Electronic Technique，2026，52(5)：33-38.

A novel slew-rate enhanced constant-transconductance rail-to-rail operational amplifier

Abstract： This paper presents a novel constant-gm rail-to-rail operational amplifier with enhanced slew rate. The input stage utilizes an improved redundant differential pair incorporating series-transistor and current-mirror techniques to reduce subthreshold current and minimize transconductance variation to only 1.4%. Supported by slew-rate enhancement circuitry, the design improves dynamic response by utilizing MOS voltage characteristics across operating regions. Ahuja compensation is employed to simultaneously optimize power consumption and area while maintaining adequate phase margin. Implemented in a 40 nm CMOS process under a 3.3 V supply, the amplifier supports full rail-to-rail input/output. The slew rates reach 7.52 V/μs (positive) and 7.87 V/μs (negative), improved by 50%. It attains a DC gain of 114 dB, a phase margin of 79°, and a unity-gain bandwidth of 3.7 MHz. It attains a CMRR of 135 dB and PSRR of 90 dB. The proposed op-amp is well-suited for high-precision and low-power analog applications.

Key words : constant transconductance；rail-to-rail；slew rate enhancement；Ahuja；operational amplifier